py-aiger

py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).

https://github.com/mvcisback/py-aiger

Science Score: 77.0%

This score indicates how likely this project is to be science-related based on various indicators:

  • CITATION.cff file
    Found CITATION.cff file
  • codemeta.json file
    Found codemeta.json file
  • .zenodo.json file
    Found .zenodo.json file
  • DOI references
    Found 3 DOI reference(s) in README
  • Academic publication links
    Links to: zenodo.org
  • Committers with academic emails
    1 of 7 committers (14.3%) from academic institutions
  • Institutional organization owner
  • JOSS paper metadata
  • Scientific vocabulary similarity
    Low similarity (14.6%) to scientific vocabulary

Keywords

aiger circuit
Last synced: 6 months ago · JSON representation ·

Repository

py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).

Basic Info
  • Host: GitHub
  • Owner: mvcisback
  • License: mit
  • Language: Python
  • Default Branch: main
  • Homepage:
  • Size: 512 KB
Statistics
  • Stars: 47
  • Watchers: 8
  • Forks: 9
  • Open Issues: 2
  • Releases: 5
Topics
aiger circuit
Created almost 8 years ago · Last pushed about 1 year ago
Metadata Files
Readme Changelog License Citation

README.md

py-aiger logo
pyAiger: A python library for manipulating sequential and combinatorial circuits.

Build Status codecov PyPI version License: MIT DOI

Table of Contents

About PyAiger

  1. Q: How is Py-Aiger pronounced? A: Like "pie" + "grrr".
  2. Q: Why python? Aren't you worried about performance?! A: No. The goals of this library are ease of use and hackability.
  3. Q: No, I'm really concerned about performance! A: This library is not suited to implement logic solvers. For everything else, such as the creation and manipulation of circuits with many thousands of gates in between solver calls, the library is really fast enough.
  4. Q: Where does the name come from? A: Aiger is a popular circuit format. The format is used in hardware model checking, synthesis, and is supported by ABC. The name is a combination of AIG (standing for And-Inverter-Graph) and the mountain Eiger.

Installation

If you just need to use aiger, you can just run:

$ pip install py-aiger

For developers, note that this project uses the poetry python package/dependency management tool. Please familarize yourself with it and then run:

$ poetry install

Usage

``` import aiger

x, y, z, w = aiger.atoms('x', 'y', 'z', 'w')

expr1 = z.implies(x & y) expr2 = z & w

circ1 = expr1.with_output('z') \ # Get AIG for expr1 with output 'z'. .aig circ2 = circ1 >> circ2 # Feed outputs of circ1 into circ2. ```

Boolean Expression DSL

While powerful, when writing combinatorial circuits, the Sequential Circuit DSL can be somewhat clumsy. For this common usecase, we have developed the Boolean Expression DSL. All circuits generated this way have a single output.

```python import aiger x, y, z = aiger.atoms('x', 'y', 'z') expr1 = x & y # circuit with inputs 'x', 'y' and 1 output computing x AND y. expr2 = x | y # logical or. expr3 = x ^ y # logical xor. expr4 = x == y # logical ==, xnor. expr5 = x.implies(y) expr6 = ~x # logical negation. expr7 = aiger.ite(x, y, z) # if x then y else z.

Atoms can be constants.

expr8 = x & True # Equivalent to just x. expr9 = x & False # Equivalent to const False.

Specifying output name of boolean expression.

- Output is a long uuid otherwise.

expr10 = expr5.withoutput('ximpliesy') assert expr10.output == 'ximplies_y'

And you can inspect the AIG if needed.

circ = x.aig

And of course, you can get a BoolExpr from a single output aig.

expr10 = aiger.BoolExpr(circ) ```

Sequential Circuit DSL

```python import aiger from aiger import utils

Parser for ascii AIGER format.

aig1 = aiger.load(pathtoaig1file.aag) aig2 = aiger.load(pathtoaig2file.aag) ```

Sequential composition

python aig3 = aig1 >> aig2

Parallel composition

python aig4 = aig1 | aig2

Circuits with Latches and Delayed Feedback

Sometimes one requires some outputs to be feed back into the circuits as time delayed inputs. This can be accomplished using the loopback method. This method takes in a variable number of dictionaries encoding how to wire an input to an output. The wiring dictionaries with the following keys and default values:

| Key | Default | Meaning | | ----------- | ------- | -------------------------------- | | input | | Input port | | output | | Output port | | latch | input | Latch name | | init | True | Initial latch value | | keep_output | True | Keep loopbacked output as output |

```python

Connect output y to input x with delay, initialized to True.

(Default initialization is False.)

aig5 = aig1.loopback({ "input": "x", "output": "y", })

aig6 = aig1.loopback({ "input": "x", "output": "y", }, { "input": "z", "output": "z", "latch": "zlatch", "init": False, "keepoutputs": False })

```

Relabeling

There are two syntaxes for relabeling. The first uses indexing syntax in a nod to notation often used variable substition in math.

The syntax is the relabel method, which is preferable when one wants to be explicit, even for those not familar with py-aiger.

```python

Relabel input 'x' to 'z'.

aig1['i', {'x': 'z'}] aig1.relabel('input', {'x': 'z'})

Relabel output 'y' to 'w'.

aig1['o', {'y': 'w'}] aig1.relabel('output', {'y': 'w'})

Relabel latches 'l1' to 'l2'.

aig1['l', {'l1': 'l2'}] aig1.relabel('latch', {'l1': 'l2'}) ```

Evaluation

```python

Combinatoric evaluation.

aig3(inputs={'x':True, 'y':False})

Sequential evaluation.

sim = aig3.simulate([{'x': 0, 'y': 0}, {'x': 1, 'y': 2}, {'x': 3, 'y': 4}])

Simulation Coroutine

sim = aig3.simulator() # Coroutine next(sim) # Initialize print(sim.send({'x': 0, 'y': 0})) print(sim.send({'x': 1, 'y': 2})) print(sim.send({'x': 3, 'y': 4}))

Unroll

aig4 = aig3.unroll(steps=10, init=True) ```

Useful circuits

```python

Fix input x to be False.

aig4 = aiger.source({'x': False}) >> aig3

Remove output y.

aig4 = aig3 >> aiger.sink(['y'])

Create duplicate w of output y.

aig4 = aig3 >> aiger.tee({'y': ['y', 'w']}) ```

Extra

```python aiger.common.eval_order(aig1) # Returns topological ordering of circuit gates.

Convert object into an AIG from multiple formats including BoolExpr, AIG, str, and filepaths.

aiger.to_aig(aig1) ```

Ecosystem

Stable

  • py-aiger-bv: Extension of pyAiger for manipulating sequential bitvector circuits.
  • py-aiger-cnf: BoolExpr to Object representing CNF. Mostly used for interfacing with py-aiger-sat.
  • py-aiger-past-ltl: Converts Past Linear Temporal Logic to aiger circuits.
  • py-aiger-coins: Library for creating circuits that encode discrete distributions.
  • py-aiger-sat: Bridge between py-aiger and py-sat.
  • py-aiger-bdd: Aiger <-> BDD bridge.
  • py-aiger-gridworld: Create aiger circuits representing gridworlds.
  • py-aiger-dfa: Convert between finite automata and sequential circuits.

Underdevelopment

Related Projects

  • pyAig: Another python library for working with AIGER circuits.

Owner

  • Name: Marcell Vazquez-Chanlatte
  • Login: mvcisback
  • Kind: user

Citation (CITATION.cff)

cff-version: 1.2.0
message: "If you use this software, please cite it as below."
authors:
- family-names: "Vazquez-Chanlatte"
  given-names: "Marcell"
  orcid: "https://orcid.org/0000-0002-1248-0000"
- family-names: "Rabe"
  given-names: "Markus"
title: "py-aiger"
url: "https://github.com/mvcisback/py-aiger"
date-released: 2021-02-2021
version: 6

GitHub Events

Total
  • Issues event: 2
  • Watch event: 5
  • Issue comment event: 19
  • Push event: 2
  • Pull request event: 1
  • Create event: 1
Last Year
  • Issues event: 2
  • Watch event: 5
  • Issue comment event: 19
  • Push event: 2
  • Pull request event: 1
  • Create event: 1

Committers

Last synced: over 2 years ago

All Time
  • Total Commits: 484
  • Total Committers: 7
  • Avg Commits per committer: 69.143
  • Development Distribution Score (DDS): 0.171
Past Year
  • Commits: 12
  • Committers: 3
  • Avg Commits per committer: 4.0
  • Development Distribution Score (DDS): 0.5
Top Committers
Name Email Commits
Marcell Vazquez-Chanlatte m****c@l****m 401
Markus N Rabe m****e@g****m 51
pyup-bot g****t@p****o 24
masinag g****a@v****t 5
Eric e****m@e****u 1
osankur o****r 1
Sebastian Junges s****s@g****m 1
Committer Domains (Top 20 + Academic)

Issues and Pull Requests

Last synced: 6 months ago

All Time
  • Total issues: 31
  • Total pull requests: 74
  • Average time to close issues: 11 months
  • Average time to close pull requests: 14 days
  • Total issue authors: 12
  • Total pull request authors: 6
  • Average comments per issue: 3.39
  • Average comments per pull request: 1.09
  • Merged pull requests: 56
  • Bot issues: 0
  • Bot pull requests: 0
Past Year
  • Issues: 1
  • Pull requests: 1
  • Average time to close issues: about 2 months
  • Average time to close pull requests: about 23 hours
  • Issue authors: 1
  • Pull request authors: 1
  • Average comments per issue: 22.0
  • Average comments per pull request: 0.0
  • Merged pull requests: 1
  • Bot issues: 0
  • Bot pull requests: 0
Top Authors
Issue Authors
  • mvcisback (10)
  • MarkusRabe (8)
  • masinag (4)
  • sjunges (1)
  • jbroot (1)
  • Acdimy (1)
  • MatCos (1)
  • alexeyignatiev (1)
  • arw12625 (1)
  • Hemer911 (1)
  • allrtaken (1)
  • sventhijssen (1)
Pull Request Authors
  • mvcisback (35)
  • pyup-bot (30)
  • MarkusRabe (5)
  • masinag (3)
  • osankur (1)
  • sjunges (1)
Top Labels
Issue Labels
wontfix (1)
Pull Request Labels

Packages

  • Total packages: 1
  • Total downloads:
    • pypi 13,724 last-month
  • Total dependent packages: 8
  • Total dependent repositories: 21
  • Total versions: 70
  • Total maintainers: 1
pypi.org: py-aiger

A python library for manipulating sequential and-inverter gates.

  • Versions: 70
  • Dependent Packages: 8
  • Dependent Repositories: 21
  • Downloads: 13,724 Last month
Rankings
Dependent packages count: 1.1%
Dependent repos count: 3.2%
Average: 7.3%
Downloads: 8.4%
Stargazers count: 11.0%
Forks count: 12.5%
Maintainers (1)
Last synced: 6 months ago

Dependencies

poetry.lock pypi
  • atomicwrites 1.4.1 develop
  • colorama 0.4.5 develop
  • coverage 6.4.3 develop
  • execnet 1.9.0 develop
  • flake8 5.0.4 develop
  • hypothesis 5.49.0 develop
  • hypothesis-cfg 0.2 develop
  • importlib-metadata 4.2.0 develop
  • iniconfig 1.1.1 develop
  • mccabe 0.7.0 develop
  • packaging 21.3 develop
  • pluggy 1.0.0 develop
  • py 1.11.0 develop
  • py-aiger-ptltl 3.1.0 develop
  • pycodestyle 2.9.1 develop
  • pyflakes 2.5.0 develop
  • pyparsing 3.0.9 develop
  • pytest 7.1.2 develop
  • pytest-cov 2.12.1 develop
  • pytest-flake8 1.1.1 develop
  • pytest-forked 1.4.0 develop
  • pytest-xdist 2.5.0 develop
  • toml 0.10.2 develop
  • tomli 2.0.1 develop
  • typing-extensions 4.3.0 develop
  • zipp 3.8.1 develop
  • attrs 21.4.0
  • bidict 0.21.4
  • funcy 1.17
  • parsimonious 0.8.1
  • pyrsistent 0.18.1
  • six 1.16.0
  • sortedcontainers 2.4.0
  • toposort 1.7