pulpino-top-level-cw305
The top-level Verilog files for the CW305 to run and communicate with the RISC-V PULPINO core
Science Score: 44.0%
This score indicates how likely this project is to be science-related based on various indicators:
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✓CITATION.cff file
Found CITATION.cff file -
✓codemeta.json file
Found codemeta.json file -
✓.zenodo.json file
Found .zenodo.json file -
○DOI references
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○Academic publication links
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○Academic email domains
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○Institutional organization owner
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○JOSS paper metadata
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○Scientific vocabulary similarity
Low similarity (6.5%) to scientific vocabulary
Keywords
Repository
The top-level Verilog files for the CW305 to run and communicate with the RISC-V PULPINO core
Basic Info
Statistics
- Stars: 5
- Watchers: 2
- Forks: 2
- Open Issues: 0
- Releases: 1
Topics
Metadata Files
README.md
Pulpino Top-Level CW305
A set of instructions, files and utilities to use the PULPINO Risc-V on a ChipWhisperer 305 FPGA. This repository contains 4 main sections:
Important Resources
This is a list of resources that was used during the production of this repository and can contain information that is also useful for the users.
Contributions
If you find any mistakes or feel like you improved parts to this repository which are useful to others, please consider contributing back to the repository.
Owner
- Name: Gijs Burghoorn
- Login: coastalwhite
- Kind: user
- Location: Netherlands
- Company: Polars
- Website: gburghoorn.com
- Repositories: 103
- Profile: https://github.com/coastalwhite
Rusty Hardware and Security Guy 🦀
Citation (CITATION.cff)
cff-version: 1.2.0
title: Pulpino Top-Level CW305
message: >-
If you use this software, please cite it using the
metadata from this file.
type: software
authors:
- given-names: Gijs
family-names: Burghoorn
email: g.j.burghoorn@tudelft.nl
affiliation: Grenoble INP
orcid: 'https://orcid.org/0000-0001-9299-015X'
identifiers:
- type: doi
value: 10.5281/zenodo.10837804
repository-code: 'https://github.com/coastalwhite/pulpino-top-level-cw305'
abstract: >-
A set of instructions, files and utilities to use the
PULPINO RISC-V on a ChipWhisperer 305 FPGA.
keywords:
- RISC-V
- ChipWhisperer
license: GPL-3.0
GitHub Events
Total
- Issues event: 1
- Watch event: 1
- Issue comment event: 1
- Push event: 2
- Fork event: 1
Last Year
- Issues event: 1
- Watch event: 1
- Issue comment event: 1
- Push event: 2
- Fork event: 1
Issues and Pull Requests
Last synced: about 1 year ago
All Time
- Total issues: 0
- Total pull requests: 0
- Average time to close issues: N/A
- Average time to close pull requests: N/A
- Total issue authors: 0
- Total pull request authors: 0
- Average comments per issue: 0
- Average comments per pull request: 0
- Merged pull requests: 0
- Bot issues: 0
- Bot pull requests: 0
Past Year
- Issues: 0
- Pull requests: 0
- Average time to close issues: N/A
- Average time to close pull requests: N/A
- Issue authors: 0
- Pull request authors: 0
- Average comments per issue: 0
- Average comments per pull request: 0
- Merged pull requests: 0
- Bot issues: 0
- Bot pull requests: 0
Top Authors
Issue Authors
- magalilegall (1)