https://github.com/caglayandokme/verilogexercises

This is a repo where I share the Verilog exercises that I worked on.

https://github.com/caglayandokme/verilogexercises

Science Score: 26.0%

This score indicates how likely this project is to be science-related based on various indicators:

  • CITATION.cff file
  • codemeta.json file
    Found codemeta.json file
  • .zenodo.json file
    Found .zenodo.json file
  • DOI references
  • Academic publication links
  • Academic email domains
  • Institutional organization owner
  • JOSS paper metadata
  • Scientific vocabulary similarity
    Low similarity (0.6%) to scientific vocabulary

Keywords

verilog
Last synced: 10 months ago · JSON representation

Repository

This is a repo where I share the Verilog exercises that I worked on.

Basic Info
  • Host: GitHub
  • Owner: CaglayanDokme
  • Language: Verilog
  • Default Branch: main
  • Homepage:
  • Size: 37.1 KB
Statistics
  • Stars: 0
  • Watchers: 1
  • Forks: 0
  • Open Issues: 0
  • Releases: 0
Topics
verilog
Created over 4 years ago · Last pushed over 4 years ago
Metadata Files
Readme

README.md

VerilogExercises

This is a repo where I share the Verilog exercises that I worked on. Related files are grouped with folders.

Owner

  • Name: Caglayan DOKME
  • Login: CaglayanDokme
  • Kind: user
  • Location: Ankara/Türkiye
  • Company: Plan-S Satellite and Space Systems

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