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Open Source Science

https://github.com/coloquinte/locked-tapeout

Logic locking of a design build on TinyTapeout

https://github.com/coloquinte/locked-tapeout

Science Score: 13.0%

This score indicates how likely this project is to be science-related based on various indicators:

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    CITATION.cff file
  • ✓
    codemeta.json file
    Found codemeta.json file
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    .zenodo.json file
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    DOI references
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    Academic publication links
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    Academic email domains
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    Institutional organization owner
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    JOSS paper metadata
  • ○
    Scientific vocabulary similarity
    Low similarity (4.0%) to scientific vocabulary
Last synced: 10 months ago · JSON representation

Repository

Logic locking of a design build on TinyTapeout

Basic Info
  • Host: GitHub
  • Owner: Coloquinte
  • License: apache-2.0
  • Language: Verilog
  • Default Branch: main
  • Homepage:
  • Size: 150 KB
Statistics
  • Stars: 4
  • Watchers: 3
  • Forks: 0
  • Open Issues: 0
  • Releases: 0
Created over 2 years ago · Last pushed over 2 years ago
Metadata Files
Readme License

README.md

Locking a design using Moosic and TinyTapeout

My Image

Logic locking is a way to secure silicon chips against supply chain attacks. We wrote a Yosys plugin, Moosic, to apply logic locking solutions easily using a fully open source toolchain.

This is a showcase design to show how to apply logic locking on a simple example. It uses TinyTapeout to go all the way to a silicon chip! Have a look at the blog post on the YosysHQ blog for more information.

Owner

  • Name: Gabriel Gouvine
  • Login: Coloquinte
  • Kind: user
  • Location: Edinburgh
  • Company: AMD

GitHub Events

Total
  • Watch event: 3
Last Year
  • Watch event: 3

Issues and Pull Requests

Last synced: about 1 year ago

All Time
  • Total issues: 2
  • Total pull requests: 0
  • Average time to close issues: about 2 hours
  • Average time to close pull requests: N/A
  • Total issue authors: 1
  • Total pull request authors: 0
  • Average comments per issue: 1.5
  • Average comments per pull request: 0
  • Merged pull requests: 0
  • Bot issues: 0
  • Bot pull requests: 0
Past Year
  • Issues: 0
  • Pull requests: 0
  • Average time to close issues: N/A
  • Average time to close pull requests: N/A
  • Issue authors: 0
  • Pull request authors: 0
  • Average comments per issue: 0
  • Average comments per pull request: 0
  • Merged pull requests: 0
  • Bot issues: 0
  • Bot pull requests: 0
View more stats
Top Authors
Issue Authors
  • mattvenn (2)
Pull Request Authors
Top Labels
Issue Labels
Pull Request Labels

Dependencies

.github/workflows/docs.yaml actions
  • TinyTapeout/tt-gds-action/docs tt06 composite
  • actions/checkout v3 composite
.github/workflows/gds.yaml actions
  • TinyTapeout/tt-gds-action tt06 composite
  • TinyTapeout/tt-gds-action/gl_test tt06 composite
  • TinyTapeout/tt-gds-action/precheck tt06 composite
  • TinyTapeout/tt-gds-action/viewer tt06 composite
  • actions/checkout v3 composite
.github/workflows/lock.yml actions
  • actions/checkout v3 composite
  • actions/upload-artifact v3 composite
  • hendrikmuhs/ccache-action v1.2 composite
.github/workflows/test.yaml actions
  • YosysHQ/setup-oss-cad-suite v2 composite
  • actions/checkout v4 composite
  • actions/upload-artifact v3 composite
  • test-summary/action v2 composite