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spi-master-rhs2116

SPI logic to interface with the RHS2116 chip.

https://github.com/mattiadif/spi-master-rhs2116

Science Score: 44.0%

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    CITATION.cff file
    Found CITATION.cff file
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    Low similarity (6.2%) to scientific vocabulary
Last synced: 6 months ago · JSON representation ·

Repository

SPI logic to interface with the RHS2116 chip.

Basic Info
  • Host: GitHub
  • Owner: MattiaDif
  • License: mit
  • Language: VHDL
  • Default Branch: main
  • Size: 53.7 KB
Statistics
  • Stars: 2
  • Watchers: 1
  • Forks: 0
  • Open Issues: 0
  • Releases: 2
Created about 3 years ago · Last pushed over 1 year ago
Metadata Files
Readme License Citation

README.md

SPI-master-RHS2116

SPI logic to interface with the RHS2116 chip (link), for FPGA.

Info: - CPOL = 0 - CPHA = 0

For detailed information about the SPI requirements, refer to Intan RHS2116 documentation: datasheet.

The SPI has been validated for an FPGA architecture running at 100MHz, and it has been optimized to match the chip specification and to allow SPI clock frequency customization. Since the SPI logic has been designed for RHS2116 chip, it works with clock polarity (CPOL) and clock phase (CPHA) equal to 0.

Installation

To clone this repo open your terminal and run:

git clone https://github.com/MattiaDif/SPI-master-RHS2116.git

REFERENCE

If you use this repo, please cite:

"Di Florio, M. SPI-master-RHS2116 (Version 0.2) [Computer software]. https://github.com/MattiaDif/SPI-master-RHS2116"

Notes

To contribute refers to the dev branch!

Owner

  • Name: Mattia Di Florio
  • Login: MattiaDif
  • Kind: user
  • Location: Genoa
  • Company: University of Genoa, Istituto Italiano di Tecnologia

PhD student in Bioengineering at University of Genoa.

Citation (CITATION.cff) 

cff-version: 1.0.0
message: "If you use this software, please cite it as below."
authors:
- family-names: "Di Florio"
  given-names: "Mattia"
title: "SPI-master-RHS2116"
version: 0.2.0
date-released: XX/XX/XXXX
url: "https://github.com/MattiaDif/SPI-master-RHS2116"

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