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Recent Releases of champsim

champsim - 2024-12

This release features a number of enhancements, which require updates to the interfaces of modules. Modules are now specified as C++ types and can opt into behavior, rather than being forced to specify all of their hooks. A large number of bugs were also fixed. More details are in the notes below.

Thank you for your continued support of ChampSim!

What's Changed

Enhancements

  • Added support for modules as objects by @ngober in https://github.com/ChampSim/ChampSim/pull/330
  • Add FR-FCFS policy to memory controller scheduler. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/383
  • Created strong type for addresses by @ngober in https://github.com/ChampSim/ChampSim/pull/297
  • Added strong types for bandwidths by @ngober in https://github.com/ChampSim/ChampSim/pull/400
  • Introduced strong types for time units by @ngober in https://github.com/ChampSim/ChampSim/pull/367
  • Added cache fill hook for replacement policies by @ngober in https://github.com/ChampSim/ChampSim/pull/434
  • DIB hit buffer added by @zmkzLe in https://github.com/ChampSim/ChampSim/pull/449
  • Added 'Publications' page to documentation by @ngober in https://github.com/ChampSim/ChampSim/pull/493
  • Attempt to Fix AMPM Performance by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/521
  • Added vmem randomization in config by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/538
  • Added livelock detector by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/523
  • Added downstream stats for cache, fixed cache miss latency calculations to use downstream. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/536
  • Dual RAT register rename scheme by @joshualmashburn in https://github.com/ChampSim/ChampSim/pull/532
  • Changed plain-printer to indicate origin cpu of cache stats. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/544
  • Added modern dram mappings to memory controller. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/545
  • Replace the tag checking logic in cache.cc with a round-robin method. by @chaseblock in https://github.com/ChampSim/ChampSim/pull/490 ### Bug Fixes
  • Fixed bug where the wrong stats were used to calculate AMAT by @ngober in https://github.com/ChampSim/ChampSim/pull/373
  • Fixed bug with cache line dirty flag being reset. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/389
  • fix: explicit constructor calls for units types by @joshualmashburn in https://github.com/ChampSim/ChampSim/pull/439
  • Fixed Hashed Perceptron predictor by @ngober in https://github.com/ChampSim/ChampSim/pull/530
  • Fixed bug where loads with register dependencies would issue early by @ngober in https://github.com/ChampSim/ChampSim/pull/540
  • Added check at schedule for allocated src regs by @joshualmashburn in https://github.com/ChampSim/ChampSim/pull/555
  • Fix: Varying queue sizes now varies queue sizes by @GinoAC in https://github.com/ChampSim/ChampSim/pull/409
  • bugfix: Set minimum latency for core stages to 1 by @zmkzLe in https://github.com/ChampSim/ChampSim/pull/402
  • Fix for latency issue in cache builders. by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/526
  • Fix config scripts bug that causes frequency to always be 4GHz regardless of config by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/537
  • Fix for issue #527. Reg producers erase moved to retire by @joshualmashburn in https://github.com/ChampSim/ChampSim/pull/528
  • Fix for Broken DRRIP RRPV Update by @Quangmire in https://github.com/ChampSim/ChampSim/pull/506
  • fixed btb return stack for large virtual addresses by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/543
  • Ptw deadlock bug fix by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/432
  • Dram size fix by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/494
  • Fix MacOS Compile Error by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/498
  • bug fixed: entries of DIB hit buffer and decode buffer exceed the limits by @zmkzLe in https://github.com/ChampSim/ChampSim/pull/503 ### Other Changes
  • Modify branch type deduction. by @jofepre in https://github.com/ChampSim/ChampSim/pull/372
  • Update champsim_config.json to reflect low-grade DDR5 memory, fix timing issue with refresh by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/514
  • Added DRAM refresh, converted timings to cycles in DRAM controller, DRAM controller cycle correction by @maccoymerrell in https://github.com/ChampSim/ChampSim/pull/504

New Contributors

  • @maccoymerrell made their first contribution in https://github.com/ChampSim/ChampSim/pull/383
  • @zmkzLe made their first contribution in https://github.com/ChampSim/ChampSim/pull/402
  • @joshualmashburn made their first contribution in https://github.com/ChampSim/ChampSim/pull/439
  • @chaseblock made their first contribution in https://github.com/ChampSim/ChampSim/pull/490
  • @Quangmire made their first contribution in https://github.com/ChampSim/ChampSim/pull/506

Full Changelog: https://github.com/ChampSim/ChampSim/compare/2023-08...2024-12

- C++
Published by ngober about 1 year ago

champsim - 2023-08

This version is the merge of #353.

Included in this version: - Parallel TLB accesses - Improved configuration flexibility - Hybrid modules

- C++
Published by ngober over 2 years ago

champsim - 2022-01

This release is the merge from #200 plus bugfixes that have occurred since then.

Included in this version: - Heterogeneous cores - Arbitrary cache configurations - A JSON-based configuration system

- C++
Published by ngober over 2 years ago

champsim - ChampSim-IPC1

This is the version of ChampSim used for the First Instruction Prefetching Competition in 2020.

https://research.ece.ncsu.edu/ipc/

- C++
Published by ngober over 5 years ago