Recent Releases of enso-nic
enso-nic - Timestamp offset, support for newer kernel, USB bug fix
What's Changed
- Small bug fix for finding the FPGA USB port number by @HelloKayT in https://github.com/crossroadsfpga/enso/pull/23
- Driver updates to support kernel v6.5 by @glass-hash in https://github.com/crossroadsfpga/enso/pull/24
- Timestamp offset by @hsadok in https://github.com/crossroadsfpga/enso/pull/25
New Contributors
- @HelloKayT made their first contribution in https://github.com/crossroadsfpga/enso/pull/23
- @glass-hash made their first contribution in https://github.com/crossroadsfpga/enso/pull/24
SHA256: 6df768ba4c60b92561ff1b22fb5872c798c32a12262bd0ef4861e7f5770c965d intel_stratix10mx_bitstream.sof
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.4.5...v0.4.6
- SystemVerilog
Published by hsadok over 1 year ago
enso-nic - Complete software backend
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.4.4...v0.4.5
SHA256: 0588a435a79fe713aca5b4f46d4d9795122e40adbb7733483748be861dd9fae3 intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok about 2 years ago
enso-nic - Fixes a hardware bug that could lead to pipes not receiving data in some corner cases
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.4.3...v0.4.4
SHA256: 0588a435a79fe713aca5b4f46d4d9795122e40adbb7733483748be861dd9fae3 intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok about 2 years ago
enso-nic - Small fixes to setup, example, and docs
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.4.2...v0.4.3
SHA256: ae69fc140e1937ce26838b3ad0c25dbfb87bacbb51d1a7dffe7a3cb61aea365e intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok about 2 years ago
enso-nic - Compatibility with Linux >5.0
Ensure kernel module is compatible with newer kernels. Also fixes bug where an old bitstream could be downloaded.
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.4.1...v0.4.2
SHA256: ae69fc140e1937ce26838b3ad0c25dbfb87bacbb51d1a7dffe7a3cb61aea365e intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok about 2 years ago
enso-nic - Centralized Queue Allocation
The kernel now is responsible for queue allocation and deallocation. Having this centralized in the kernel eliminates the need for the hack to figure out pipe IDs based on the core number and number of queues per core. Pipes can now be allocated in arbitrary order and different applications (and threads) can use different numbers of pipes.
Fallback queues are also now configured and managed from software. It is no longer possible to configure those from JTAG.
These changes also required API changes to eliminate the need to specify number of queues and cores when instantiating a Device as well as to be able to specify that a given pipe is a fallback pipe. Check the docs for the latest API. In particular the changes to Device::Create, Device::AllocateRxPipe, Device::AllocateRxTxPipe, as well as the new methods to enable or disable round robin.
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.3.3...v0.4.0
SHA256: ae69fc140e1937ce26838b3ad0c25dbfb87bacbb51d1a7dffe7a3cb61aea365e intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok over 2 years ago
enso-nic - Separate Backend
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.3.2...v0.3.3
SHA256: cfb8319e52ba792bd04f3eba60727008f41d24d23e405047cfa6e4ebad6f7fbb intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok over 2 years ago
enso-nic - Adding documentation for hardware modules
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.3.1...v0.3.2
SHA256: cfb8319e52ba792bd04f3eba60727008f41d24d23e405047cfa6e4ebad6f7fbb intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok almost 3 years ago
enso-nic - Minor changes and adding to Zenodo
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.3.0...v0.3.1
SHA256: cfb8319e52ba792bd04f3eba60727008f41d24d23e405047cfa6e4ebad6f7fbb intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok almost 3 years ago
enso-nic - Minor API changes and usability improvements
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.2.0...v0.3.0
SHA256: cfb8319e52ba792bd04f3eba60727008f41d24d23e405047cfa6e4ebad6f7fbb intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok almost 3 years ago
enso-nic - New software API and many other changes
Full Changelog: https://github.com/crossroadsfpga/enso/compare/v0.1.20...v0.2.0
SHA256: 982e4b3ba1cf1991db320f02a0d642dba8200b257cba638636cb7d4a47ecec20 intel_stratix10mx_bitstream.sof
- SystemVerilog
Published by hsadok almost 3 years ago