cva6

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

https://github.com/openhwgroup/cva6

Science Score: 67.0%

This score indicates how likely this project is to be science-related based on various indicators:

✓
CITATION.cff file
Found CITATION.cff file
✓
codemeta.json file
Found codemeta.json file
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.zenodo.json file
Found .zenodo.json file
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DOI references
Found 1 DOI reference(s) in README
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Academic publication links
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Committers with academic emails
25 of 197 committers (12.7%) from academic institutions
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Institutional organization owner
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JOSS paper metadata
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Scientific vocabulary similarity
Low similarity (19.4%) to scientific vocabulary

Keywords

ariane asic cpu fpga risc-v rv64gc systemverilog-hdl

Keywords from Contributors

profiles interactive mesh interpretability benchmarking sequences generic projection standardization optim

Last synced: 6 months ago · JSON representation ·

Repository

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

Basic Info

Host: GitHub
Owner: openhwgroup
License: other
Language: Assembly
Default Branch: master
Homepage: https://docs.openhwgroup.org/projects/cva6-user-manual/
Size: 140 MB

Statistics

Stars: 2,585
Watchers: 93
Forks: 821
Open Issues: 214
Releases: 9

Topics

ariane asic cpu fpga risc-v rv64gc systemverilog-hdl

Created about 8 years ago · Last pushed 6 months ago

Metadata Files

Readme Changelog Contributing License Citation Codeowners

CVA6 RISC-V CPU

CVA6 is a 6-stage, single-issue, in-order CPU which implements the 64-bit RISC-V instruction set. It fully implements I, M, A and C extensions as specified in Volume I: User-Level ISA V 2.3 as well as the draft privilege extension 1.10. It implements three privilege levels M, S, U to fully support a Unix-like operating system. Furthermore, it is compliant to the draft external debug spec 0.13.

It has a configurable size, separate TLBs, a hardware PTW and branch-prediction (branch target buffer and branch history table). The primary design goal was on reducing critical path length.

The CVA6 core is part of a vivid ecosystem. In this document, we gather pointers to this ecosystem (building blocks, designs, partners...).

A performance model of CVA6 is available in the perf-model/ folder of this repository. It can be used to investigate performance-related micro-architecture changes.

Quick setup

The following instructions will allow you to compile and run a Verilator model of the CVA6 APU (which instantiates the CVA6 core) within the CVA6 APU testbench (corev_apu/tb).

Throughout all build and simulations scripts executions, you can use the environment variable NUM_JOBS to set the number of concurrent jobs launched by make: - if left undefined, NUM_JOBS will default to 1, resulting in a sequential execution of make jobs; - when setting NUM_JOBS to an explicit value, it is recommended not to exceed 2/3 of the total number of virtual cores available on your system.

Checkout the repository and initialize all submodules. sh git clone https://github.com/openhwgroup/cva6.git cd cva6 git submodule update --init --recursive
Install the GCC Toolchain build prerequisites then the toolchain itself.

:warning: It is strongly recommended to use the toolchain built with the provided scripts.

Install cmake, version 3.14 or higher.
Set the RISCV environment variable. sh export RISCV=/path/to/toolchain/installation/directory
Install help2man and device-tree-compiler packages.

For Debian-based Linux distributions, run :

sh sudo apt-get install help2man device-tree-compiler

Install the riscv-dv requirements:

sh pip3 install -r verif/sim/dv/requirements.txt

Run these commands to install a custom Spike and Verilator (i.e. these versions must be used to simulate the CVA6) and these tests suites. sh # DV_SIMULATORS is detailed in the next section export DV_SIMULATORS=veri-testharness,spike bash verif/regress/smoke-tests.sh

Tutorials

Running Simulations
ASIC Implementation
FPGA Implementation and running an OS

Directory Structure

The directory structure separates the CVA6 RISC-V CPU core from the CORE-V-APU FPGA Emulation Platform. Files, directories and submodules under cva6 are for the core only and should not have any dependencies on the APU. Files, directories and submodules under corev_apu are for the FPGA Emulation platform. The CVA6 core can be compiled stand-alone, and obviously the APU is dependent on the core.

The top-level directories of this repo: * ci: Scriptware for CI. * common: Source code used by both the CVA6 Core and the COREV APU. Subdirectories from here are local for common files that are hosted in this repo and submodules that are hosted in other repos. * core: Source code for the CVA6 Core only. There should be no sources in this directory used to build anything other than the CVA6 core. * corev_apu: Source code for the CVA6 APU, exclusive of the CVA6 core. There should be no sources in this directory used to build the CVA6 core. * docs: Documentation. * pd: Example and CI scripts to synthesis CVA6. * util: General utility scriptware. * vendor: Third-party IP maintained outside the repository. * verif: Verification environment for the CVA6. The verification files shared with other cores are in the core-v-verif repository on GitHub. core-v-verif is defined as a cva6 submodule.

verif Directories

bsp: board support package for test-programs compiled/assembled/linked for the CVA6. This BSP is used by both core testbench and uvmt_cva6 UVM verification environment.
regress: scripts to install tools, test suites, CVA6 code and to execute tests
sim: simulation environment (e.g. riscv-dv)
tb: testbench module instancing the core
tests: source of test cases and test lists

Contributing

We highly appreciate community contributions. To ease the work of reviewing contributions, please review CONTRIBUTING.

Contributions to the documentation (docs/ and tutorials/ directories) are very welcome as well.

If you find any problems or issues with CVA6 or the documentation, please check out the issue tracker and create a new issue if your problem is not yet tracked. \ The CVA6 Kanban Board loosely tracks planned improvements.

Publication

If you use CVA6 in your academic work you can cite us:

CVA6 Publication

``` @article{zaruba2019cost, author={F. {Zaruba} and L. {Benini}}, journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, title={The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology}, year={2019}, volume={27}, number={11}, pages={2629-2640}, doi={10.1109/TVLSI.2019.2926114}, ISSN={1557-9999}, month={Nov}, } ```

Acknowledgements

Check out the acknowledgements.

Owner

Name: OpenHW Group
Login: openhwgroup
Kind: organization
Email: info@openhwgroup.org
Location: Ottawa, Ontario, Canada

Website: www.openhwgroup.org
Twitter: openhwgroup
Repositories: 34
Profile: https://github.com/openhwgroup

Citation (CITATION.cff)

cff-version: 1.2.0
message: "If you use this software, please cite it as below."
authors:
- family-names: "Zaruba"
  given-names: "Florian"
  orcid: "https://orcid.org/0000-0002-8194-6521"
- family-names: "Benini"
  given-names: "Luca"
  orcid: "https://orcid.org/0000-0001-8068-3806"
title: "The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology"
version: 2.0.4
doi: 10.1109/TVLSI.2019.2926114
date-released: 2019-07-26
url: "https://github.com/openhwgroup/cva6"

Committers

Last synced: 9 months ago

All Time

Total Commits: 5,792
Total Committers: 197
Avg Commits per committer: 29.401
Development Distribution Score (DDS): 0.871

Past Year

Commits: 476
Committers: 54
Avg Commits per committer: 8.815
Development Distribution Score (DDS): 0.863

Top Committers

Name	Email	Commits
Mike Thompson	m**e@o**g	748
Florian Zaruba	f**a@b**t	700
Florian Zaruba	z**f@i**h	612
Steve Richmond	S**d@s**m	576
Robin Pedersen	R**n@s**m	346
JeanRochCoulon	j**n@t**m	280
Michael Schaffner	s**r@i**h	247
Jalali	1****i	183
Zbigniew Chamski	z**i@t**m	160
André Sintzoff	6****f	139
Côme	1****s	138
Nils Wistoff	n**f@i**h	104
Guillaume Chauvon	9****n	89
Oystein Knauserud	O**d@s**m	76
eroom1966	m**e@i**m	68
Henrik Fegran	H**n@s**m	65
David Poulin	d**n@d**a	62
Stefan Mach	s**h@i**h	56
AEzzejjari	1****i	51
Aimee Sutton	a**n@m**a	49
dependabot[bot]	4****]	48
Zineb El Kacimi	z**i@e**m	46
Yannick Casamatta	y**a@t**m	46
valentinThomazic	v**c@t**m	45
Moritz Schneider	s**z@s**h	45
Fatima Saleem	f**m@1**i	38
Greg Tumbush	g**h@e**m	33
MarioOpenHWGroup	1****p	31
Jérôme Quévremont	j**t@t**m	27
AngelaGonzalezMarino	1****o	26
and 167 more...

Committer Domains (Top 20 + Academic)

silabs.com: 11 thalesgroup.com: 11 10xengineers.ai: 8 iis.ee.ethz.ch: 6 student.ethz.ch: 3 imperas.com: 3 openhwgroup.org: 3 metrics.ca: 2 external.thalesgroup.com: 2 emmicro-us.com: 2 axelera.ai: 2 163.com: 2 ee.ethz.ch: 1 maipo.ee.ethz.ch: 1 embecosm.com: 1 zju.edu.cn: 1 micron.com: 1 openhwgroup.com: 1 aldec.com: 1 ethz.ch: 1 cl.cam.ac.uk: 1 student.uni-luebeck.de: 1 cs.columbia.edu: 1 alumni.cmu.edu: 1 univ-grenoble-alpes.fr: 1 princeton.edu: 1 univ-ubs.fr: 1 ucsb.edu: 1 cam.ac.uk: 1 cs.washington.edu: 1 mail.utoronto.ca: 1 larain6.ee.ethz.ch: 1

Issues and Pull Requests

Last synced: 6 months ago

All Time

Total issues: 310
Total pull requests: 643
Average time to close issues: 4 months
Average time to close pull requests: 9 days
Total issue authors: 111
Total pull request authors: 74
Average comments per issue: 3.1
Average comments per pull request: 3.35
Merged pull requests: 451
Bot issues: 0
Bot pull requests: 65

Past Year

Issues: 151
Pull requests: 591
Average time to close issues: about 1 month
Average time to close pull requests: 7 days
Issue authors: 59
Pull request authors: 61
Average comments per issue: 1.96
Average comments per pull request: 3.29
Merged pull requests: 415
Bot issues: 0
Bot pull requests: 65

View more stats

Top Authors

Issue Authors

JeanRochCoulon (41)
AyoubJalali (35)
zarubaf (23)
khandelwaltanuj (19)
zchamski (14)
MikeOpenHWGroup (13)
ASintzoff (11)
riscv914 (11)
dvusingh (10)
salaheddinhetalani (10)
cathales (9)
jason23g (9)
CoralieAllioux (8)
AngelaGonzalezMarino (7)
Tanishqgithub (7)

Pull Request Authors

JeanRochCoulon (139)
dependabot[bot] (118)
ASintzoff (111)
AyoubJalali (108)
valentinThomazic (68)
cathales (65)
Gchauvon (60)
AngelaGonzalezMarino (51)
zchamski (50)
niwis (35)
yanicasa (28)
ricted98 (27)
CoralieAllioux (20)
AEzzejjari (19)
cfuguet (19)

Top Labels

Issue Labels

Type:Bug (246) notCV32A65X (81) Status:Stale (43) Type:Question (37) CV32A65X (37) Type:Task (35) Component:Verif (33) Component:RTL (29) PARAM:CSR (17) Component:Doc (17) Status:New (15) Type:Enhancement (14) Component:Tool-and-build (13) Component:SpikeTandem (11) CV32A60AX (11) CV32A60X (8) Type:Item-of-task (8) PARAM:MMU (8) Status:In Progress (7) PARAM:CVXIF (5) PARAM:FPU (5) Good First Issue (4) CV64A6 (4) cv64a60ax (4) Type:Lint (4) Status:Resolved (4) PARAM:PMA (3) Component:Doc:UserManual (2) Component:Software (2) Status:Wont-fix (1)

Pull Request Labels

dependencies (33) submodules (33) Status:Stale (23) Type:Bug (9) Status:Do-not-merge (9) Component:Doc (9) Type:Enhancement (8) CV32A65X (8) Component:Doc:UserManual (7) notCV32A65X (3) Component:RTL (3) PARAM:CVXIF (2) Component:Verif (2) CV32A60X (2) CV32A60AX (1) Component:Tool-and-build (1)

Packages

Total packages: 1
Total downloads: unknown

Total dependent packages: 0
Total dependent repositories: 0
Total versions: 10

proxy.golang.org: github.com/openhwgroup/cva6

Documentation: https://pkg.go.dev/github.com/openhwgroup/cva6#section-documentation
License: other
Latest release: v5.3.0+incompatible
published about 1 year ago

Versions: 10
Dependent Packages: 0
Dependent Repositories: 0

Rankings

Dependent packages count: 5.6%

Average: 5.8%

Dependent repos count: 5.9%

Last synced: 6 months ago

Dependencies

docs/requirements.txt pypi

sphinx >=2.1.0
sphinx_rtd_theme *

cva6

Science Score: 67.0%

Keywords

Keywords from Contributors

Repository

Basic Info

Statistics

Topics

Metadata Files

README.md

CVA6 RISC-V CPU

Quick setup

Tutorials

Directory Structure

verif Directories

Contributing

Publication

Acknowledgements

Owner

Citation (CITATION.cff)

Committers

All Time

Past Year

Top Committers

Committer Domains (Top 20 + Academic)

Issues and Pull Requests

All Time

Past Year

Top Authors

Issue Authors

Pull Request Authors

Top Labels

Issue Labels

Pull Request Labels

Packages

proxy.golang.org: github.com/openhwgroup/cva6

Rankings

Dependencies