Science Score: 31.0%

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  • Host: GitHub
  • Owner: vaughnbetz
  • Language: Verilog
  • Default Branch: master
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Created about 12 years ago · Last pushed almost 2 years ago
Metadata Files
Readme Citation

README.md

COFFE

COFFE is a tool to create the circuitry and area, delay and power models for FPGA tiles (logic, RAM or heterogeneous tiles like DSP blocks).

If you make changes to COFFE, run the "teststoplevel.py" script in the "tests" folder to do some basic checks that existing functionality still works.

How to cite:
Read the citation guide.

Owner

  • Login: vaughnbetz
  • Kind: user

Citation (Citation Guide)

This guide is supposed to help clarify which of the COFFE-related papers should be cited when using COFFE.
Generally, it's a good idea to cite the paper describing the latest version of COFFE:

S. Yazdanshenas and V. Betz, "COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures", ACM TRETS, Vol. 12, No. 1, April 2018, pp. 3:1 - 3:27.

If you are using Latex, you can cite the publication by adding the following to your bibiolography file:

@article{10.1145/3301298,
author = {Yazdanshenas, Sadegh and Betz, Vaughn},
title = {COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures},
issue_date = {April 2018},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {12},
number = {1},
issn = {1936-7406},
url = {https://doi.org/10.1145/3301298},
doi = {10.1145/3301298},
articleno = {3},
numpages = {27},
}


However, if you are interested in talking about and/or expanding specific features of COFFE, you can also cite one of the papers below depending on the feature of interest.

1) If you are using COFFE's heterogeneous block modelling (standard cell and full-custom hybrid), carry chains, or fracturable LUTs, please cite the following paper:

Sadegh Yazdanshenas and Vaughn Betz. "Automatic circuit design and modelling for heterogeneous FPGAs." International Conference on Field Programmable Technology (FPT), pages 9-16. IEEE, 2017.

If you are using Latex, you can cite the publication by adding the following to your bibliography file:

@inproceedings{yazdanshenas2017automatic,
  title={Automatic circuit design and modelling for heterogeneous {FPGAs}},
  author={Yazdanshenas, Sadegh and Betz, Vaughn},
  booktitle={International Conference on Field Programmable Technology (FPT)},
  pages={9--16},
  year={2017},
  organization={IEEE}
}



2) If you are using COFFE's memory block modelling (either SRAM-based or MTJ-based), please cite the following paper:

Sadegh Yazdanshenas, Kosuke Tatsumura, and Vaughn Betz. "Don't forget the memory: Automatic block RAM modelling, optimization, and architecture exploration." ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), pages 115-124. ACM, 2017.

If you are using Latex, you can cite the publication by adding the following to your bibliography file:

@inproceedings{yazdanshenas2017don,
  title={Don't Forget the Memory: Automatic Block {RAM} Modelling, Optimization, and Architecture Exploration},
  author={Yazdanshenas, Sadegh and Tatsumura, Kosuke and Betz, Vaughn},
  booktitle={ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)},
  pages={115--124},
  year={2017},
  organization={ACM}
}


3) The original COFFE paper:

Chiasson, Charles, and Vaughn Betz. "COFFE: Fully-automated transistor sizing for FPGAs." Field-Programmable Technology (FPT), 2013 International Conference on, pages 34-41. IEEE, 2013.

If you are using Latex, you can cite the publication by adding the following to your bibliography file:

@inproceedings{chiasson2013coffe,
  title={{COFFE}: Fully-automated transistor sizing for {FPGAs}},
  author={Chiasson, Charles and Betz, Vaughn},
  booktitle={International Conference on Field-Programmable Technology (FPT)},
  pages={34--41},
  year={2013}
}

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