mp
The software and hardware implementation of Memory Polynomial algorithm
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The software and hardware implementation of Memory Polynomial algorithm
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Metadata Files
README.md
The hardware implementation of Polyphase Memory Polynomial model
The model have been tested in Xilinx Versal VCK190 and Ultrascale+ ZCU102.
Introduction
Memory polynomial (MP) model is a well-known model in the area of digital predistortion (DPD). The memory polynomial (MP) utilizes only the diagonal term of the complete Volterra series, resulting in a good performance with a small number of coefficients[^1].
Mathematical principle
The mathematical equation of the memory polynomial model can be expressed as follows.
math
y_n =\sum_{m=0}^M x_{n-m} \cdot\left(\sum_{k=0}^K a_{k m}\left|x_{n-m}\right|^k\right) \\
=\sum_{m=0}^M x_{n-m} \cdot h(\left|x_{n-m}\right|)
$x$ indicates the input baseband signal, $M$ is the memory depth and $K$ is the polynomial order. The coefficients $a{km}$ can be combined with $|x{n-m}|^k$, thus put into the lookup tables (LUTs). Therefore, the content of LUTs is represented by $h(|x_{n-m}|)$.
The Python implementation of coefficients extraction and evaluation are given in
sw directory.
Hardware Implementation
We implement the MP model according to Altera white paper[^2], the hardware implementation of monophase and polyphse MP model is show below.
We implement a four phase MP model using SystemVerilog, the implementation is
given in hw directory.
[^1]: Digital Predistortion of Wideband Signals Based on Power Amplifier Model with Memory [^2]: Designing polyphase DPD solutions with 28-nm FPGAs
Owner
- Name: SEU-MSLab
- Login: SEU-MSLab
- Kind: organization
- Location: China
- Repositories: 1
- Profile: https://github.com/SEU-MSLab
Microwave System Lab of Southeast University
Citation (CITATION.cff)
# This CITATION.cff file was generated with cffinit.
# Visit https://bit.ly/cffinit to generate yours today!
cff-version: 1.2.0
title: MP
message: >-
If you use this software, please cite it using the
metadata from this file.
type: software
authors:
- name: Microwave System Lab @ Southeast University
city: Nanjing
country: CN
email: chao.yu@seu.edu.cn
- given-names: Zhe
family-names: Li
email: lizhe99@seu.edu.cn
repository-code: 'https://github.com/SEU-MSLab/MP'
abstract: >-
The software and hardware implementation of Memory
Polynomial algorithm
keywords:
- FPGA
- Digital predistortion
- SystemVerilog
license: MIT
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