edacurry

Home of the Unified Mixed-signal Netlist Parser Framework

https://github.com/sydelity-net/edacurry

Science Score: 44.0%

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Repository

Home of the Unified Mixed-signal Netlist Parser Framework

Basic Info
  • Host: GitHub
  • Owner: sydelity-net
  • License: mit
  • Language: C++
  • Default Branch: main
  • Homepage:
  • Size: 2.96 MB
Statistics
  • Stars: 2
  • Watchers: 2
  • Forks: 3
  • Open Issues: 0
  • Releases: 2
Created over 4 years ago · Last pushed over 1 year ago
Metadata Files
Readme License Citation

README.md

EDACurry - Home of the Unified Mixed-signal Netlist Parser Framework

There are plentiful successors of SPICE language for describing transistor-level designs. For most of them, the semantic matches those of SPICE, and only the syntax is changed. Others instead provide more default models or analysis tools.

The EDACurry library are based on a shared semantic for reading, writing, or manipulating transistor-level designs. The ultimate goal of the framework is: reading an input design written in a specific syntax and then allowing to write the same design in another syntax. First, the input description is parsed by a language-specific front-end which turns it into an in-memory abstract syntax tree that follows the common semantic. Then, the in-memory description can be subject to different user-defined manipulations built on top of a series of API or visitor/listener classes. Finally, the description goes through the desired back-end, transforming the in-memory description into the target transistor-level language.

Project Structure and Files

.
├── grammar/                # Spectre and Eldo grammar.
├── sources/                # Netlist manipulator (includes C++ parser).
├── LICENSE                       
└── README.md

Citation (CITATION.cff)

cff-version: 1.2.0
message: If you use this software, please cite it using these metadata.
title: A Common Manipulation Framework for Transistor-Level Languages
abstract: There are plentiful successors of SPICE language for describing transistor-level designs. For most of them, the semantic matches those of SPICE, and only the syntax is changed. Others instead provide more default models or analysis tools. Consequently, a commercial tool is usually required for simulating, analyzing, and especially manipulating these languages. This article proposes a framework that relies on the shared semantic for reading, writing, or manipulating transistor-level designs. The ultimate goal of the framework is, reading an input design written in a specific syntax and then allowing to write the same design in another syntax. First, the input description is parsed by a language-specific front-end which turns it into an in-memory abstract syntax tree that follows the common semantic. Then, the in-memory description can be subject to different user-defined manipulations built on top of a series of API or visitor/listener classes. Finally, the description goes through the desired back-end, transforming the in-memory description into the target transistor-level language. As a use-case for the proposed framework, we chose the process of analog fault injection. This activity requires adding, removing, or replacing nodes, components, or even entire sub-circuits. Therefore, the framework is completely written in C++, and its APIs are also interfaced with python. The entire framework is open-source and available on GitHub.
authors:
  - family-names: Dall'Ora
    given-names: Nicola
    orcid: "https://orcid.org/0000-0003-0656-9786"
  - family-names: Azam
    given-names: Sadia
    orcid: "https://orcid.org/0000-0003-0480-4607"
  - family-names: Fraccaroli
    given-names: Enrico
    orcid: "https://orcid.org/0000-0002-9739-6501"
  - family-names: Alberts
    given-names: André
  - family-names: Fummi
    given-names: Franco
    orcid: "https://orcid.org/0000-0002-4404-5791"
version: 0.1
doi: "10.1109/FDL53530.2021.9568379"
date-released: "2021-10-26"
url: "https://github.com/sydelity-net/EDACurry/"

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