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https://github.com/icarogabryel/flote

Flote is a HDL and Python framework for simulation. Designed to be friendly, simple, and productive. Easy to use and learn.

https://github.com/icarogabryel/flote

Science Score: 26.0%

This score indicates how likely this project is to be science-related based on various indicators:

  • ○
    CITATION.cff file
  • ✓
    codemeta.json file
    Found codemeta.json file
  • ✓
    .zenodo.json file
    Found .zenodo.json file
  • ○
    DOI references
  • ○
    Academic publication links
  • ○
    Committers with academic emails
  • ○
    Institutional organization owner
  • ○
    JOSS paper metadata
  • ○
    Scientific vocabulary similarity
    Low similarity (16.0%) to scientific vocabulary

Keywords

computer-architecture computer-organization digital-circuits eletronics framework hardware-description-language hardware-designs hdl integrated-circuits processor-architecture python python-module simulation
Last synced: 5 months ago · JSON representation

Repository

Flote is a HDL and Python framework for simulation. Designed to be friendly, simple, and productive. Easy to use and learn.

Basic Info
  • Host: GitHub
  • Owner: icarogabryel
  • License: gpl-3.0
  • Language: Python
  • Default Branch: main
  • Homepage:
  • Size: 438 KB
Statistics
  • Stars: 2
  • Watchers: 2
  • Forks: 0
  • Open Issues: 0
  • Releases: 3
Topics
computer-architecture computer-organization digital-circuits eletronics framework hardware-description-language hardware-designs hdl integrated-circuits processor-architecture python python-module simulation
Created over 1 year ago · Last pushed 6 months ago
Metadata Files
Readme License

README.md

Flote


Flote logo

GitHub Repo stars GitHub Release PyPI - Version license

🛸 Introduction

Flote is a hardware description language and Python framework for hardware simulation. It is designed to be friendly, simple, light and productive. More easy to use and learn than Verilog and VHDL. Using Flote, you can create integrated circuits component by using it's HDL and/or Python framework that work by the HLS (High Level Synthesis) concept.

Flote logo

Here is an example of a half adder in Flote:

```flote comp halfAdder { in bit a; in bit b;

out bit sum = a xor b; out bit carry = a and b;

} ```

⚙️ How it works

Flote's Evaluator uses a structure of a compiler's front-end to elaborate the component. It has a scanner, parser and a builder. This last one is responsible for build the component, an object that can be manipulated in Python and simulates the behavior of the integrated circuit. The model object it's a set of signals buses and uses event driven algorithm and dynamic programming to simulate the behavior of the circuit.

Using the HLS side, you can create the component "by hand". Also with the use of the Python package you can manipulate the signals and sava then in a waveform file.

🚀 Release

Flote is in beta development. You can see the latest releases in the GitHub repository.

📝 To Do List

  • [X] Make the simulator class
  • [X] Make EBNF for the language
  • [X] Make Scanner
  • [X] Make Parser
  • [X] Make Builder
  • [X] Make accept expressions
  • [X] Improve the algorithm of simulation
  • [X] Improve structure
  • [X] Improve declaration and assignment
  • [X] Improve Semantic Analysis
  • [X] Create waveform class
  • [X] Add line number in semantic errors
  • [X] Improve testbench methods
  • [ ] Add multi-dimensional bit signals support
    • [ ] Declaration
    • [ ] Assignment
    • [ ] Operation
    • [ ] Error handling
    • [ ] Indexing
    • [ ] Slicing
    • [ ] Concatenation
    • [ ] Big endian support
    • [ ] N-Dimensional arrays support
  • [ ] Add sub-components support
  • [ ] Add Python calls support
  • [ ] Improve HLS support
  • [ ] Add manual time control
  • [ ] Add others file types support for waveforms

Owner

  • Name: Ícaro Gabryel
  • Login: icarogabryel
  • Kind: user
  • Location: Piauí, Brazil

Computer science student at Federal University of Piauí, Brazil. Focused is computer architecture, OS, networks and software engineering.

GitHub Events

Total
  • Release event: 3
  • Watch event: 1
  • Push event: 87
  • Create event: 2
Last Year
  • Release event: 3
  • Watch event: 1
  • Push event: 87
  • Create event: 2

Committers

Last synced: 6 months ago

All Time
  • Total Commits: 225
  • Total Committers: 1
  • Avg Commits per committer: 225.0
  • Development Distribution Score (DDS): 0.0
Past Year
  • Commits: 225
  • Committers: 1
  • Avg Commits per committer: 225.0
  • Development Distribution Score (DDS): 0.0
Top Committers
Name Email Commits
Ícaro Gabryel i****1@g****m 225

Issues and Pull Requests

Last synced: 7 months ago

All Time
  • Total issues: 0
  • Total pull requests: 0
  • Average time to close issues: N/A
  • Average time to close pull requests: N/A
  • Total issue authors: 0
  • Total pull request authors: 0
  • Average comments per issue: 0
  • Average comments per pull request: 0
  • Merged pull requests: 0
  • Bot issues: 0
  • Bot pull requests: 0
Past Year
  • Issues: 0
  • Pull requests: 0
  • Average time to close issues: N/A
  • Average time to close pull requests: N/A
  • Issue authors: 0
  • Pull request authors: 0
  • Average comments per issue: 0
  • Average comments per pull request: 0
  • Merged pull requests: 0
  • Bot issues: 0
  • Bot pull requests: 0
View more stats
Top Authors
Issue Authors
Pull Request Authors
Top Labels
Issue Labels
Pull Request Labels

Packages

  • Total packages: 1
  • Total downloads:
    • pypi 13 last-month
  • Total dependent packages: 0
  • Total dependent repositories: 0
  • Total versions: 3
  • Total maintainers: 1
pypi.org: flote

Flote is a HDL and Python framework for simulation. Designed to befriendly, simple, and productive. Easy to use and learn.

  • Versions: 3
  • Dependent Packages: 0
  • Dependent Repositories: 0
  • Downloads: 13 Last month
Rankings
Dependent packages count: 9.3%
Average: 30.7%
Dependent repos count: 52.2%
Maintainers (1)
icarogabryel
Last synced: 6 months ago