Updated 10 months ago
core-v-mcu
This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
Updated 10 months ago
rfsoc_dds
Systemverilog for direct digital synthesis of high-purity sinusoids for use with RFSoCs running at full sample rate
Updated 10 months ago
https://github.com/caglayandokme/systemverilogexercises
This is a repo where I share the System Verilog exercises that I worked on. Contributions and suggestions are welcome
Updated 10 months ago
ksa
A synthesizable and modular Kogge-Stone Adder (KSA) implementation in SystemVerilog.