Projects | Open Source Science

Projects

Updated 10 months ago

https://github.com/icarogabryel/flote • Rank 3.3 • Science 26%

Flote is a HDL and Python framework for simulation. Designed to be friendly, simple, and productive. Easy to use and learn.

computer-architecture computer-organization digital-circuits eletronics framework hardware-description-language hardware-designs hdl integrated-circuits processor-architecture python python-module simulation

Updated 10 months ago

neotrng • Science 54%

🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

asic asic-design chaos cryptography entropy entropy-source fpga hdl key-generator neorv32 random random-number-generators ring-oscillator rng rtl trng vhdl

Updated 10 months ago

neorv32 • Science 49%

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

asip cpu embedded fpga hdl microcontroller multi-core neorv32 on-chip-debbuger processor risc-v riscv rtos rv32 smp soc soft-core system-on-chip vhdl

Updated 10 months ago

livehd • Science 52%

Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

asic fpga hdl lgraph live simulation synthesis

Scientific Software

Updated 10 months ago

Kactus2 — Peer-reviewed • Science 93%

Kactus2: A graphical EDA tool built on the IP-XACT standard - Published in JOSS (2017)

design eda fpga hardware hdl ip-xact mpsoc reuse system-on-chip

Scientific Software · Peer-reviewed

Updated 10 months ago

https://github.com/ahp-electronics/fpga-template • Science 13%

Lattice FPGA Verilog project template

embedded fpga fpga-board fpga-programming hdl template verilog